Hi,
Could I ask a number of principal and long enough questions?
1) Since Bizen transistor looks symmetric, does it bear resemblance with JFET? If yes, how it differs from the normally-off complementary JFETs presented in the patent US6307223? If no, could the logic gates built of the Bizen transistors be considered as a version of I2L, as for example US4160918?
2) What is the maximum voltage allowed at the input of Bizen transistor? Do the Zener diodes protect the inputs?
What is the maximum number of inputs the Bizen transistor can have (within the existing technology)? If this number is greater than three, could a reversible breakdown occur between the inputs? It occurs between the emmitters in TTL see P. A. Mohan et al., "Negative resistance in multiemitter transistors," Proceedings of the IEEE, 63(11), pp.1612-1613, 1975.
3) Is the Bizen technology compatible with the planar CMOS process? If yes, can it be scaled down to 28 nm?
4) Do you have a SPICE model of the Bizen transistor? For quick start even not so accurate model will be good. Which CADs allow post layout simulation of the Bizen circuits?
5) Have you compared the susceptibility of the Bizen and CMOS transistors to ionizing radiation?
Thank you,
Alex.
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