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PRESS 2022 ITM & ZPOLAR LAUNCH Wall(s)
PRESS 2019 BIZEN LAUNCH Wall(s)
YAHOO FINANCE
Search For The Next: UK Collaboration Unveils Bizen® a Transistor Wafer Process Technology Promising to Slash Lead Times, Wafer Area and Process Layers While Increasing Speed, Reducing Power and Increasing Gate Density Over CMOS
ELEKTRONIK PRAXIS GERMANY
Bizen is bigger than Brexit
BCBITI UKRAINE
The UK has developed a manufacturing process that is much better than CMOS
ELECTRONICS WORLD
Fabs can now reduce semiconductor production times ten-fold and significantly increase their profits
BUSINESS WIRE
UK Collaboration unveils Bizen
ELECTRONICS MEDIA
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
NEW ELECTRONICS
SFN looks to end monopoly of Taiwanese and Korean chip producers
EE TIMES
Bipolar-Zener Combo Takes On CMOS
ELECTRONIC SPECIFIER
SFN's ‘Infrastructure Time Machine’ for chip designs
ELECTRONIC PRODUCT DESIGN
Reduce chip production times 10-fold & increase net profit 40-50 times
SILICON UK
Search For The Next: UK Collaboration Unveils Bizen® a Transistor Wafer Process Technology Promising to Slash Lead Times, Wafer Area and Process Layers While Increasing Speed, Reducing Power and Increasing Gate Density Over CMOS
NMI
SFN looks to end monopoly of Taiwanese and Korean chip producers with ‘Infrastructure Time Machine’
TECHWORKS NMI
Bizen - UK Collaboration presents an exciting new wafer process
ELECTRONICS ERA
Bizen wafer process used to build Zpolar Transistors with Zpolar Tunnel Logic (ZTL); Ends monopoly of Taiwanese and Korean chip producers; Addresses semiconductor shortage crisis
EE TIMES EUROPE
New Transistor Design Aims to Boost Business for UK Fabs
SILICON TECHNOLOGY POWERING BUSINESS
Fabs to Reduce Semiconductor Production Times 10 Fold and Increase Net Profit 40-50 Times
TECHWORKS
ITM enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
EPDT
Disruptive new wafer process technology to slash lead time winding back Moores Law
ELECTRONICS SPECIFIER
Plugging the leak
NTDHOY SPANISH
Thanks to the new process technology for transistor wafers Bizen uses the tunnel effect of quantum mechanics to allow complex ICs to be produced in “previous generations” plants.
ELECTRONICS MAKER
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
EENEWS EUROPE
UK start-up process looks for fab partners
ELECTRONICS MEDIA
uk collaboration unveils bizen a transistor wafer process technology
01NET
French publication - Extension of Moore's Law: The Incredible Promises of the Bizen Transistor
ELECTRONICS WEEKLY
Zpolar logic aims to beat CMOS, on 10 year older fabs
THE AI JOURNAL
SFN Enables Fabs to Reduce Semiconductor Production Times 10 Fold and Increase Net Profit 40-50 Times
DEFINING ELECTRONICS
SFN launches ‘Infrastructure Time Machine’ that enables fabs to reduce semiconductor production times 10 fold and increase net profit 40-50 times
HACKADAY
The Bizen Transistor
TIMESTECH INDIA
SFN New Machine Enables Fabs to Reduce Production Time
IXBT RUSSIA
The UK has developed a process technology that is much better than CMOS
SNEWSI USA
Infrastructure Time Machine
DESIGN & ELEKTRONIK
Is a new type of bipolar taking CMOS from throne?
ELECTRONICS WEEKLY
Tunnelling transistor offers logic power easy IC
EENEWS
Bizen uses quantum tunnell mechanics
BIT-TECH
UK startup teases CMOS-beating Bizen chip fab tech
EET ASIA
The Combination of Bipolar-Zener Takes on CMOS

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